A variety of metal-oxide-semiconductor (MOS) devices have been developed to store information in non-volatile binary form. One popular type of non-volatile MOS storage device utilizes an insulated or floating gate overlying an active substrate. Charge carriers are transported to and from the floating gate by various structures and mechanisms during "write" and "erase" operations. The presence or absence of charge on the floating gate may be sensed and then interpreted as a "1" or "0" during "read" operations.
One early (and popular) non-volatile MOS memory utilized an application of radiation, typically ultraviolet light, to accomplish erasure of the memory cells. However, more recent development has centered about devices which may be electrically erased.
Some non-volatile cells are erased by causing transfer of charge from the floating gate to the active substrate. Other designs employ an additional third gate for erasing. Charge may be transferred from the floating gate to the third gate, termed the "erase" gate. A "flash" EEPROM is an electrically-erasable, programmable ROM in which all or almost all of the cells may be erased simultaneously.
There remain, however, a variety of problems confronting designers of non-volatile memory devices. One almost universally desired goal is the achievement of small cell size. Compared to typical standard MOS transistors and even to various dynamic random access memory cells, non-volatile cells are rather large. For various reasons, non-volatile cells cannot always be easily scaled downward as semiconductor process linewidths and feature sizes decrease.
Designers in search of ever denser memory chips have also investigated various compact array designs. The current trend in array design is toward the use of "virtual ground" arrays. The virtual ground array may be made locally "contactless."There is no need to create space-consuming windows above the source/drain junctions because the junctions themselves may serve as buried bit lines.
However, virtual ground arrays may exhibit unpredictable performance if certain bit patterns are stored in them (a phenomenon termed "pattern sensitivity") and the entire array may be disabled if one bit line should be shorted to the substrate or any other signal lines (a phenomenon termed "fault propagation"). Thus, the increasingly popular virtual ground type array, despite its contactless feature presents various disadvantages which may affect both reliability and yield.
Those concerned with the development of memory devices have continuously sought smaller, more space-efficient cell designs which may be incorporated into reliable arrays which are not vulnerable to bit line failure or pattern sensitivity.